Computer systems are becoming increasingly pervasive in our society, including everything from small handheld electronic devices, such as personal digital data assistants and cellular phones, to application-specific electronic components, such as set-top boxes and other consumer electronics, to medium-sized mobile and desktop systems to large workstations and servers. To provide more powerful computer systems for consumers, designers strive to continually increase the operating speed of the processor. A by-product of increasing processor speed is an increase in the amount of power consumed. The increased power consumption reduces battery life.
A variety of techniques are known for reducing the power consumption in computer systems. For example, the Advanced Configuration and Power Interface (ACPI) Specification (Rev. 2.0a, Mar. 31, 2002) sets forth information about how to reduce the dynamic power consumption of portable and other computer systems. With respect to processors used in computer systems, different processor power states (or C states) are defined in the ACPI Specification.
Mobile computer systems have historically implemented a variety of C states to save power. C0 is a running state, where the processor is not idle, executing code and performing useful work. When the processor is idle (e.g., not executing any thread), the OS may place the processor into a halt state by issuing a processor halt sequence of instruction. For example, the OS may issue a “STI; HLT” (Enable Interrupts; Halt Processor) instruction sequence to place the processor into a halted state until an unmasked interrupt is registered. In the C1 state, the processor is able to respond to snoop transactions, and wake up very quickly to execute code or service bus master snoop transactions. The processor may progressively cycle through lower states such as C2, C3 and C4 as necessary to save even more power. C2 is a stop grant or mobile “Quick Start” state, where typically clocks are gated off to a large portion of the die. The processor is able to service snoops in the C2 state. The C2 state also supports a fairly low latency exit to allow software to quickly resume execution. C3 is a deep sleep state, where clocks may be gated either internally or externally to the entire processor. In the C3 state, the processor is unable to snoop bus master transactions. Lastly, the C4 state is a variation of the C3 state whereby clocks are stopped and the voltage is reduced to sub-operational levels (voltage sufficient only to maintain processor state). Since leakage power is related to the voltage applied to the part, the C4 state is extremely good at reducing processor power to extremely low levels.
Another technique that mobile computer systems have implemented to save power is to dynamically adjust the frequency and voltage at which the processor operates. For example, operating the processor at a lower frequency and voltage may help reduce processor power consumption. Operating the processor at a lower frequency and voltage may not stop the processor but may change the performance level of the processor. Being able to dynamically adjust the frequency and voltage of the processor allows the processor to be more responsive to events that occur in the computer system. For example, when temperature in the computer system rises to an undesirable level, instead of stopping the processor and causing the computer system to come to a screeching halt, the frequency may be reduced. When the frequency is reduced, the voltage may be reduced. For example, when the performance level of the processor is reduced by 20%, the power consumption of the processor may be reduced by as much as 50%. It's a non-linear trade off of performance versus power. Thus, when the workload is light (e.g., email, word processing, etc.), the processor may run at lower performance and lower voltage, operating at a more efficient level allowing the battery to last longer. Alternatively, when there is an application that requires higher performance, the frequency and voltage may be dynamically increased to provide best possible performance at the expense of battery life.
Hyper-Threading Technology (HT) is a technology from Intel® Corporation of Santa Clara, Calif. that enables execution of threads in parallel using a single physical processor. A physical processor refers to a physical processor die, or in the case of the Intel Pentium® 4 Family of processors, a single package. HT incorporates two logical processors on one physical processor die. A logical processor is an independent processor visible to the OS, capable of executing code and maintaining a unique architectural state from other processors in a system. HT is achieved by duplicating the architectural state, with each architecture state sharing one set of processor execution resources.
When a processor supports HT, multiple threads may be executed simultaneously. Because it is unlikely that threads in both logical processors will stall at the same moment, the shared execution unit is more effectively utilized resulting in higher overall performance at a given clock rate. When processors that support HT are implemented in the mobile computer systems, there may be performance and power management issues that need to be addressed.